Test Resource Partitioning for System-On-A-Chip

by Krishnendu Chakrabarty and Vikram Iyengar

Test Resource Partitioning for System-on-a-Chip is about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. Plug-and-play refers to the paradigm in which core-to-core interfaces as well as core-to-SOC logic interfaces are standardized, such that cores can be easily plugged into "virtual sockets" on the SOC design, and core tests can be plugged into the SOC during test...

• Format: Hardcover
• Language: English
• ISBN: 1402071191
• ISBN13: 9781402071195
• Release Date: June 2002
• Publisher: Springer
• Length: 232 Pages
• Weight: 1.17 lbs.
• Dimensions: 0.8" x 6.4" x 9.6"