Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling

by Rabi Mahapatra, Ayan Mandal, Sunil P Khatri, et al.

Book Overview

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches...

• Format: Hardcover
• Language: English
• ISBN: 1461494044
• ISBN13: 9781461494041
• Release Date: November 2013
• Publisher: Springer
• Length: 143 Pages
• Weight: 0.75 lbs.
• Dimensions: 0.6" x 6.0" x 9.0"