Logic Synthesis and Verification Algorithms

by Gary D. Hachtel and Fabio Somenzi

Book Overview

Logic Synthesis and Verification Algorithms blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application... This description may be from another edition of this product.

• Format: Paperback
• Language: English
• ISBN: 1475770367
• ISBN13: 9781475770360
• Release Date: March 2013
• Publisher: Springer
• Length: 564 Pages
• Weight: 2.26 lbs.
• Dimensions: 1.2" x 7.0" x 10.0"

Customer Reviews

exceptional...

This book is good. It covers all the fundamentals needed to learn two level and multi level logic synthesis and verification. It's a good stepping stone for those readers wanting to delve more into the IEEE publications area later on in their careers when implementing new algorithms for logic synthesis.

nachiketh potlapally

I had the oppurtunity to study this book in my graduate study. I think it is a well-written book, which has a substantial coverage of the field of logic synthesis and verification. I would highly recommend this book to advanced readers and those who are mathematically inclined. The expertise of the authors is reflected in the content of the book, and this can be fully appreciated by the readers having the qualifications mentioned above.