Layout Minimization of CMOS Cells

by Robert L. Maziasz and John P. Hayes

Book Overview

The layout of an integrated circuit (lC) is the process of assigning geometric shape, size and position to the components (transistors and connections) used in its fabrication. Since the number of components in modem ICs is enormous, computer- aided-design (CAD) programs are required to automate the difficult layout process. Prior CAD methods are inexact or limited in scope, and produce layouts whose area, and consequently manufacturing costs, are...

• Format: Paperback
• Language: English
• ISBN: 1461366119
• ISBN13: 9781461366119
• Release Date: September 2012
• Publisher: Springer
• Length: 169 Pages
• Weight: 0.60 lbs.
• Dimensions: 0.4" x 6.1" x 9.2"