Introduction to Logic Synthesis Using Verilog Hdl

by Robert B. Reese and Mitchell A. Thornton

Introduction to Logic Synthesis Using Verilog HDL explains how to write accurate Verilog descriptions of digital systems that can be synthesized into digital system netlists with desirable characteristics. The book contains numerous Verilog examples that begin with simple combinational networks and progress to synchronous sequential logic systems. Common pitfalls in the development of synthesizable Verilog HDL are also discussed along with methods...

• Format: Paperback
• Language: English
• ISBN: 3031797426
• ISBN13: 9783031797422
• Release Date: December 2007
• Publisher: Springer
• Length: 75 Pages