CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test

by Manoj Sachdev and Andrei Pavlov

Book Overview

Foreword. Preface. Acronyms. 1. INTRODUCTION AND MOTIVATION. 1.1 Motivation. 1.2 SRAM in the Computer Memory Hierarchy. 1.3 Technology Scaling and SRAM Design and Test. 1.4 SRAM test economics. 1.5 SRAM Design and Test Tradeoffs. 1.6 Redundancy. 2. SRAM CIRCUIT DESIGN AND OPERATION. 2.1 Introduction. 2.2 SRAM block structure. 2.3 SRAM cell design. 2.4 Cell layout considerations. 2.5 Sense Amplifier and Bit Line Precharge-Equalization. 2.6 Write Driver...

• Format: Paperback
• Language: English
• ISBN: 904817855X
• ISBN13: 9789048178551
• Release Date: October 2010
• Publisher: Springer
• Length: 194 Pages
• Weight: 0.67 lbs.
• Dimensions: 0.5" x 6.1" x 9.2"