A One-Semester Course in Modeling of VSLI Interconnections

by Ashok Goel

Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors...

• Format: Paperback
• Language: English
• ISBN: 1606505122
• ISBN13: 9781606505120
• Release Date: December 2014
• Publisher: Momentum Press
• Length: 180 Pages
• Weight: 1.07 lbs.
• Dimensions: 0.8" x 6.0" x 9.0"